標題: | 電漿淺層佈植技術應用於提昇半導體元件特性研究 A Study on Plasma Shallow Ion Implantation Technology for Semiconductor Device Applications |
作者: | 崔秉鉞 Bing-Yue Tsui 國立交通大學電子工程學系 |
關鍵字: | 電漿浸潤;淺接面;金屬矽化物;Plasma immersion;shallow junction;metal silicide |
公開日期: | 2009 |
摘要: | 金氧半場效電晶體持續微縮下,會遭遇到二大問題,一是短通道效應造成元件特性劣化,二是源極與汲極兩端的寄生串連阻抗增加。
短通道效應解決方法之一是在源極與汲極兩端製作超淺接面。而解決因源極與汲極兩端的串連阻抗增加的方法,則是必須靠自動對準金屬矽化物製程技術的研發,包括降低金屬矽化物的電阻率以及接觸電阻率等等,基於許多優點,目前所使用的金屬矽化物是矽化鎳,然而矽化鎳的最大問題是其高溫反應時的熱穩定性不佳,高溫下反應會發生結塊現象及晶相轉換機制,造成矽化鎳的電阻增加,故提升矽化鎳的熱穩定性是未來的主要目標。
根據眾多文獻探討,可以發現必須要有足夠多的替代位置的碳元素摻雜到矽晶片中,才可以有效抑制雜質的擴散及二次缺陷的產生,且也能透過的碳元素摻雜來提升矽化鎳的熱穩定性,製作出低漏電流的超淺接面,以上是本計畫選擇以碳元素作為佈植元素的主要原因。本計畫是採用新的植入方式,即電漿淺層佈植技術來植入碳元素,與傳統離子佈植機相比,電漿淺層佈植的優點是技術能在短時間內作高劑量的碳摻雜,希望藉此優點,來得到高濃度替代位置的碳摻雜層,應用於超淺接面的製作以及矽化鎳熱穩定性的提升,最終希望能將此技術應用於MOSFET元件或是LTPS-TFT元件的製作技術上。 As continuing scaling down, MOSFETs have two main problems. One is short channel effect to degrade device performance, the other is the increase of source/drain parasitic series resistance. One solution of suppressing short channel effect is to fabricate ultra shallow source/drain junction. The way of solving the problem of source/drain series resistance is by developing Salicide process technology including lower resistivity, lower contact resistivity and so on. Based on several advantages, Ni silicide is used among many metal silicide materials. But the disadvantage of Ni silicide is its poor thermal stability during high temperature formation because of the agglomeration or the phase transformation of Ni silicide at high temperature, and result in the increase of Ni silicide resistance. So raising the thermal stability of Ni silicide is the main goal in the future. According to several papers published, we can conclude that it must have enough substitutional C atoms incorporated into the Si wafer to effectively suppress dopant diffusion, secondary defect formation and raising Ni silicide thermal stability, and ultra shallow junction can be achieved with lower junction leakage current. So these benefits are the main factors that we select C to be implanted in this plan. New method, the C plasma shallow ion implantation technology, is performed to implant C ions into Si substrate in this plan. As compared to the conventional ion implanter, the advantage of C PIII technology is its less time and high dose doping. We hope that the advantages of PIII can be able to get Si1-xCx layer with high substitutional C concentration to fabricate ultra shallow junction and raise the thermal stability of Ni silicide. Finally, we wish that C PIII technology can be applied in MOSFETs or LTPS-TFTs device fabrication. |
官方說明文件#: | 982001INER031 |
URI: | http://hdl.handle.net/11536/100837 https://www.grb.gov.tw/search/planDetail?id=1830938&docId=304469 |
顯示於類別: | 研究計畫 |