完整後設資料紀錄
DC 欄位語言
dc.contributor.authorHong, Hao-Chiaoen_US
dc.date.accessioned2014-12-08T15:13:05Z-
dc.date.available2014-12-08T15:13:05Z-
dc.date.issued2007-12-01en_US
dc.identifier.issn0923-8174en_US
dc.identifier.urihttp://dx.doi.org/10.1007/s10836-007-5005-7en_US
dc.identifier.urihttp://hdl.handle.net/11536/10094-
dc.description.abstractEvaluating the digital stimuli used in the design-for-digital-testability (DfDT) Sigma-Delta modulator is a time-consuming task due to its oversampling and non-linear nature. Although behavioral simulations can substantially improve the simulation speed, conventional behavioral models fail to provide accurate enough signal-to-noise ratio (SNR) predictions for this particular application. In this paper, a fully-settled linear behavior plus noise (FSLB+N) model for the DfDT Sigma-Delta modulator is presented to improve both the accuracy and the speed of the behavioral simulations. The model includes the following parameters: the finite open-loop gains, the offsets, the finite output swings, the flicker noise of the operational amplifiers (OPAMPs), as well as the thermal noises of the switched capacitors, the OPAMPs, and the reference supplies. With the proposed model, the behavioral simulation results demonstrate a high correlation with the measurement data. On average, the SNR difference between the simulation and the measurement is -1.1 dB with a maximum of 0.05 dB and a minimum of -2.2 dB. Comparing with the circuit-level simulation using HSPICE, the behavioral simulation with the FSLB+N model is 1,190,000 times faster. The proposed model not only can be used for evaluating the digital stimulus candidates, but also can be applied to system-level simulations of the mixed-signal design with an embedded DfDT Sigma-Delta modulator.en_US
dc.language.isoen_USen_US
dc.subjectdesign-for-digital-testabilityen_US
dc.subjectstimulus evaluationen_US
dc.subjectbehavioral modelen_US
dc.subjectSigma-Delta modulatoren_US
dc.titleA fully-settled linear behavior plus noise model for evaluating the digital stimuli of the design-for-digital-testability Sigma-Delta modulatorsen_US
dc.typeArticleen_US
dc.identifier.doi10.1007/s10836-007-5005-7en_US
dc.identifier.journalJOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONSen_US
dc.citation.volume23en_US
dc.citation.issue6en_US
dc.citation.spage527en_US
dc.citation.epage538en_US
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:000251381900007-
dc.citation.woscount5-
顯示於類別:期刊論文


文件中的檔案:

  1. 000251381900007.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。