完整後設資料紀錄
DC 欄位語言
dc.contributor.authorHwang, Chih-Hongen_US
dc.contributor.authorLi, Yimingen_US
dc.contributor.authorHan, Ming-Hungen_US
dc.date.accessioned2014-12-08T15:13:07Z-
dc.date.available2014-12-08T15:13:07Z-
dc.date.issued2010-05-01en_US
dc.identifier.issn0026-2714en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.microrel.2010.01.041en_US
dc.identifier.urihttp://hdl.handle.net/11536/10122-
dc.description.abstractHigh-kappa/metal-gate and vertical channel transistors are well-known solutions to continue the device scaling. This work extensively estimates the influences of the intrinsic parameter fluctuations on nanoscale fin-type field-effect-transistors and circuits by using an experimentally validated three-dimensional device and coupled device-circuit simulations. The dominance fluctuation source in threshold voltage, gate capacitance, cut-off frequency, delay time, and power has been found. The emerging fluctuation source, workfunction fluctuation, shows significant impacts on DC characteristics: however, can be ignored in AC characteristics due to the screening effect of the inversion layer. (C) 2010 Elsevier Ltd. All rights reserved.en_US
dc.language.isoen_USen_US
dc.titleStatistical variability in FinFET devices with intrinsic parameter fluctuationsen_US
dc.typeArticle; Proceedings Paperen_US
dc.identifier.doi10.1016/j.microrel.2010.01.041en_US
dc.identifier.journalMICROELECTRONICS RELIABILITYen_US
dc.citation.volume50en_US
dc.citation.issue5en_US
dc.citation.spage635en_US
dc.citation.epage638en_US
dc.contributor.department傳播研究所zh_TW
dc.contributor.department電機工程學系zh_TW
dc.contributor.departmentInstitute of Communication Studiesen_US
dc.contributor.departmentDepartment of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000278728700014-
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