完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 曹孝櫟 | en_US |
dc.contributor.author | Tsao Shiao-Li | en_US |
dc.date.accessioned | 2014-12-13T10:48:05Z | - |
dc.date.available | 2014-12-13T10:48:05Z | - |
dc.date.issued | 2009 | en_US |
dc.identifier.govdoc | NSC98-2220-E009-046 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/101260 | - |
dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=1922961&docId=319362 | en_US |
dc.description.abstract | 嵌入式網路通訊裝置例如手機、PDA(Personal Digital Assistant)、MID(Mobile Internet Device)、UMPC(Ultra Mobile PC)等具連網能力之消費電子產品對於系統之耗電相當重視,也往往是產品是否能具備市場競爭力的重要參考依據。然而在過去的研究以及開放原始碼的計畫中,針對嵌入式網路通訊裝置之耗電測試與評比工具的支援十分有限,因此使得嵌入式系統的設計發展以及研究人員需自行設計特定的系統耗電的測試除錯工具來針對其發展之嵌入式網路通訊裝置加以測試。除此之外,傳統之耗電測試工具,多半需要複雜的硬體設備,測試相當耗費時間與金錢,以軟體配合中央處理器(CPU)內部硬體評估元件之耗電評估、分析工具雖然可以降低耗電測試的成本與時間,但對於嵌入式系統層級(System Level)包含CPU、記憶體、匯流排、周邊介面等之耗電分析功能有限,亦缺乏對先進之嵌入式網路通訊裝置(例如同質或異質多核心系統、多重無線網路介面)的支援,因此亟需此方面的研究與開放原始碼的支援。 本計畫的主要目的,在於設計與開發嵌入式網路通訊裝置之系統層級耗電評估與評比之工具與標準測試流程及項目。不同於傳統之實體量測工具或單純之CPU耗電評估工具,此工具將可提供給系統發展者一個包含應用軟體耗電、作業系統耗電、CPU耗電,裝置與無線網路耗電等軟硬體耗電分析工具,以提供系統發展者除錯與瞭解系統耗電問題,同時將開發標準化測試工具、設計代表性之耗電效率參數,提供各種系統之耗電評比。本計畫預計分三年進行,在目前執行的第一年中,本計畫已經針對黑箱及白箱耗電測試,初步建立起硬體及軟體之標準量測平台。透過對各類型嵌入式網路通訊裝置之大量測試、分析與耗電原理研究,建立抽象化之耗電模型,並瞭解其誤差範圍,此模型將為耗電分析工具之核心技術,在第一年計畫進行過程當中,本計畫同時發展完成了同質多核心嵌入式系統之效能耗能評估工具mProfiler,亦完成異質多核心嵌入式系統之效能耗能之評估。第二年起將逐步改善與測試此一耗電工具,研究如何增進所提出之耗電量測軟硬體平台的可移植性,以提高量測各種不同網路裝置耗電時的便利性。並將協同其他子計畫,建立關鍵之耗電效能參數與標準測試項目,實作出適當的軟硬體插入測試(instrumentation)技術,以評量不同裝置的耗電狀況,第三年則加強耗電量測工具之分析功能與可靠性,並建立評比參數,標準測試流程及項目與報表分析工具,開放程式碼以及撰寫相關文件以供外界使用,並協助總計畫測試中心協助廠商使用本計畫研發成果。 | zh_TW |
dc.description.abstract | Power consumption is one of the most critical issues for embedded network and communication devices such as mobile phone, PDA (Personal Digital Assistant), MID (Mobile Internet Device), UMPC (Ultra Mobile PC). Unfortunately, previous studies and open source tools do not provide sufficient support for evaluating system-level power consumption, thus system designers or developers have to develop their own tools for evaluating their systems. Moreover, conventional power consumption evaluation relies on physical measurement which is both time and cost consuming. Although, software-based tools with hardware evaluation support units inside the CPU can reduce the cost and time, these tools usually evaluates CPU power consumption only. Hence, it is urgently needed to develop a system-level, including CPU, memory, buses, and peripherals, power consumption evaluation tool for advanced embedded network and communication devices such as multi-core and multiple wireless interfaces devices. This project is to develop a system-level power consumption analyzer and standard benchmarking procedures for embedded network and communication devices. Different from conventional approaches which evaluate only the CPU power consumption, our tools provide a means to evaluate the system level power consumption which provides system designers information about software (including OS and applications) and hardware (including CPU and peripheral) power consumption. Therefore, these tools can help designers to understand and diagnose the power consumption problem better. In the first year, we have accomplished both black and white box power-consumption test, and built up the hardware and software evaluation platform. Moreover, we have built up the abstract power consumption models and understood their error margin by massive testing and analyzing different types of embedded network devices. A homogeneous embedded multi-core performance and power evaluating tool, called mProfiler, and the performance evaluation of heterogeneous multi-core systems have also been developed. In the second year, the project will focus on improving our tools to enhance the ease of porting and usage. We will also collaborate with other sub-projects to build up the critical power and performance parameters and standard benchmarking procedures, items, and report analyzer. Also, software and hardware instrumentation techniques will be designed and implemented to evaluate power consumption for various devices. In the third year, we will focus on enhancing the reliability and analyzing capability of our tools, finalizing the evaluation parameters, standard benchmark procedures and items. Report analyzer, source code and related documents will be made available to the public, and also we will cooperate with the main project to promote the research effort. | en_US |
dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | 嵌入式網路通訊裝置評比技術與工具之研發---子計畫二:嵌入式網路通訊裝置耗能評比基準與工具之研發(中心分項)(I) | zh_TW |
dc.title | Power Consumption Benchmarking and Evaluation Tools for Embedded Network and Communication Devices(I) | en_US |
dc.type | Plan | en_US |
dc.contributor.department | 國立交通大學資訊工程學系(所) | zh_TW |
顯示於類別: | 研究計畫 |