Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 周景揚 | en_US |
dc.contributor.author | JOU JING-YANG | en_US |
dc.date.accessioned | 2014-12-13T10:48:36Z | - |
dc.date.available | 2014-12-13T10:48:36Z | - |
dc.date.issued | 2009 | en_US |
dc.identifier.govdoc | NSC98-2220-E009-028 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/101378 | - |
dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=1897868&docId=314256 | en_US |
dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | 使用60GHz之室內十億級位元傳輸率之無線基頻傳收機---子計畫三:針對通訊數位訊號處理器之電子系統層級驗証與合成環境(II) | zh_TW |
dc.title | An ESL System Verification and Synthesis Environment for Communication DSP(II) | en_US |
dc.type | Plan | en_US |
dc.contributor.department | 國立交通大學電子工程學系及電子研究所 | zh_TW |
Appears in Collections: | Research Plans |
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