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dc.contributor.author陳宏明en_US
dc.contributor.authorChen Hung-Mingen_US
dc.date.accessioned2014-12-13T10:50:04Z-
dc.date.available2014-12-13T10:50:04Z-
dc.date.issued2008en_US
dc.identifier.govdocNSC97-2220-E009-004zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/101956-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=1689493&docId=291412en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.title先進製程技術之設計與可靠度提昇研究---子計畫三:在後佈局與測試設計所使用之良率改善技術研究(III)zh_TW
dc.titleYield Improvement Methodologies in Post-Layout Design Flow and Design for Test(III)en_US
dc.typePlanen_US
dc.contributor.department國立交通大學電子工程學系及電子研究所zh_TW
Appears in Collections:Research Plans


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