使用60GHz之室內十億級位元傳輸率之無線基頻傳收機---子計畫五：室內無線十億級傳輸率之基頻傳收機與低功率設計技術(I)

Abstract

具有十億級資料傳送速度的無線通信設備已經成為下一世代的研究主流，以因應高 品質影音及高速資料傳送應用的到來。802.15.3c 所採用的毫米波位於60GHz 的頻帶， 因此可以因應在室內十億級位元傳輸率之個人無線區域網的高速應用。60GHz 之室內十 億級位元傳輸率之無線基頻傳收機其中的挑戰是在其天線及前端高頻電路設計以及 DSP 之補償技術。在基頻部份的挑戰為設計十億級位元之通道編碼、通道估計、同步等 部份，這對於比較複雜的演算法而言，必需利用平行化電路架構來完成。本計畫最大之 挑戰在高速及低功率及SC 及OFDM 雙模之共用。 本計畫在技術研發上有三個大目標:1.同步及通道估計子系統之硬體架構及實現;2. 通道編碼之硬體架構及實現;3.高速及低功率之設計技術與流程建立。計畫預期成果為通 道估計與同步子系統、通道編碼子系統、SOC 系統整合之模擬、設計與製作(和子計畫 2,3,4 合作)以及 802.15.3c 設計平台之完成(和子計畫1,2,3,4,5 合作)

Due to the demand of transmitting high quality Audio and Video content, Multi-Gbps wireless transceiver has become the major research topics recently. The goal of this project is to propose novel baseband design of multi-Gbps and low-power dual mode (single carrier (SC) mode and OFDM mode) baseband transceiver. 802.15.3c adopts mm wave band at 60 GHz is capable of transmitting Multi-Gbps data rate in indoor wireless environment. The challenge of this indoor wireless transceiver is the design of antenna, analog front-end and the associated baseband DSP technicals to compensate the impartment. In the baseband, the major challenge is to design the channel decoder, synchronization and channel estimation in Multi-Gbps rate. Thus, all the proposed novel algorithms shall be done in parallelism. This project will develop three major technologies, (1) Hardware design of synchronization and channel estimation; (2) Hardware design of channel decoder and (3) High-speed and low-power design technologies and design flow. The expected results are a novel wireless indoor multi-Gbps baseband transceiver with SOC implementation and its design platform (cooperated with other subprojects).