Title: 高性能混合訊號式發收機積體電路---總計畫 (II)
High Performance Mixed-Signal Transceiver Integrated Circuit(II)
Authors: 吳錦川
國立交通大學電子工程學系
Issue Date: 2000
Gov't Doc #: NSC89-2218-E009-065
URI: http://hdl.handle.net/11536/102569
https://www.grb.gov.tw/search/planDetail?id=597324&docId=112560
Appears in Collections:Research Plans