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dc.contributor.authorYang, H. J.en_US
dc.contributor.authorChin, Alberten_US
dc.contributor.authorChen, W. J.en_US
dc.contributor.authorCheng, C. F.en_US
dc.contributor.authorHuang, W. L.en_US
dc.contributor.authorHsieh, I. J.en_US
dc.contributor.authorMcAlister, S. P.en_US
dc.date.accessioned2014-12-08T15:13:18Z-
dc.date.available2014-12-08T15:13:18Z-
dc.date.issued2007-10-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2007.905375en_US
dc.identifier.urihttp://hdl.handle.net/11536/10280-
dc.description.abstractWe describe a programmable-erasable MIS capacitor with a single high-kappa Hf0.3N0.2O0.5 dielectric layer. This device showed a capacitance density of similar to 6.6 fF/mu m(2), low program and erase voltages of +5 and -5 V, respectively, and a large Delta V-fb memory window of 1.5 V. In addition, the 25 degrees C data retention was good, as indicated by program and erase decay rates of only 2 and 6.2 mV/dec, respectively. Such device retention is attributed to the deep trapping level of 1.05 eV in the Hf0.3N0.2O0.5.en_US
dc.language.isoen_USen_US
dc.subjectcapacitoren_US
dc.subjectdynamic random access memory (DRAM)en_US
dc.subjecteraseen_US
dc.subjecthigh-ken_US
dc.subjectnonvolatile memory (NVM)en_US
dc.subjectprogramen_US
dc.titleA program-erasable high-k Hf0.3N0.2O0.5 MIS capacitor with good retentionen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2007.905375en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume28en_US
dc.citation.issue10en_US
dc.citation.spage913en_US
dc.citation.epage915en_US
dc.contributor.department奈米科技中心zh_TW
dc.contributor.departmentCenter for Nanoscience and Technologyen_US
dc.identifier.wosnumberWOS:000249942100021-
dc.citation.woscount9-
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