Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 周芳鼎 | en_US |
dc.contributor.author | 洪崇智 | en_US |
dc.date.accessioned | 2014-12-16T06:12:06Z | - |
dc.date.available | 2014-12-16T06:12:06Z | - |
dc.date.issued | 2012-07-01 | en_US |
dc.identifier.govdoc | H03K005/14 | zh_TW |
dc.identifier.govdoc | H03M001/66 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/103415 | - |
dc.description.abstract | 本發明係揭露一種數位類比轉換裝置,包含一可變延遲緩衝電路與複數同步電路,緩衝電路接收一具複數位元之數位訊號,並依據上述位元從高至低之順序,分別對應依序延緩輸出一第一互補數位訊號組。每一同步電路分別接收每一第一互補數位訊號組與一時脈訊號,並以時脈訊號作為第一互補數位訊號組之時間基準,進而分別對應每一第一互補數位訊號組,輸出每一第二互補數位訊號組至一數位類比轉換單元,以將第二互補數位訊號組轉換為一類比訊號輸出。本發明利用不同輸入位元所對應的延遲時間,以控制電流開關的時序,進而降低暫態突波。 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | 數位類比轉換裝置 | zh_TW |
dc.type | Patents | en_US |
dc.citation.patentcountry | TWN | zh_TW |
dc.citation.patentnumber | 201228239 | zh_TW |
Appears in Collections: | Patents |
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