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dc.contributor.author廖元歆en_US
dc.contributor.author張添烜en_US
dc.date.accessioned2014-12-16T06:12:13Z-
dc.date.available2014-12-16T06:12:13Z-
dc.date.issued2011-12-01en_US
dc.identifier.govdocH04N007/24zh_TW
dc.identifier.govdocH03M007/00zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/103523-
dc.description.abstract提供一種背景調適性二進制算術解碼裝置及其解碼方法,其中該裝置包含:背景記憶體位址計算器,用以計算下個周期所需之背景模型在背景模型記憶體中之儲存位址;混合式背景記憶體,用以讀取並儲存該背景記憶體位址計算器之背景模型;雙符號背景調適性二進制算術解碼器,用以依照該混合式背景記憶體之背景模型輸出若干個用以更新該背景模型之範圍與偏移量之參數,並決定若干符號(bins),以及二進制語法元素比較器,用以依照該等符號判斷目前二進制序列是否符合語法元素之數值,用以選出正確的記憶體位址。zh_TW
dc.language.isozh_TWen_US
dc.title背景調適性二進制算數解碼裝置及其解碼方法zh_TW
dc.typePatentsen_US
dc.citation.patentcountryTWNzh_TW
dc.citation.patentnumber201143440zh_TW
Appears in Collections:Patents


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