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dc.contributor.author黃俊達en_US
dc.contributor.author呂智宏en_US
dc.contributor.author林步青en_US
dc.contributor.author周景揚en_US
dc.date.accessioned2014-12-16T06:12:18Z-
dc.date.available2014-12-16T06:12:18Z-
dc.date.issued2011-07-01en_US
dc.identifier.govdocG06F017/30zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/103580-
dc.description.abstract一種應用於查找表式FPGA的壓縮樹延遲最佳化之合成演算法,在不同的查找表式FPGA架構中,均可得到不同的定查找表的輸入限制,依據該輸入限制找出該查找表的元素樣本,據以產生該查找表的元素樣本集合,再根據該些元素樣本進行壓縮演算。較佳者,以整數線性規劃法合成延遲最佳化的壓縮樹,以降低壓縮樹所需的面積並提升效能。zh_TW
dc.language.isozh_TWen_US
dc.title應用於查找表式FPGA的壓縮樹延遲最佳化合成演算法zh_TW
dc.typePatentsen_US
dc.citation.patentcountryTWNzh_TW
dc.citation.patentnumber201122857zh_TW
Appears in Collections:Patents


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