Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 鄭裕庭 | en_US |
dc.contributor.author | 趙子元 | en_US |
dc.contributor.author | 許名伽 | en_US |
dc.contributor.author | 陳智 | en_US |
dc.contributor.author | 劉健民 | en_US |
dc.date.accessioned | 2014-12-16T06:12:28Z | - |
dc.date.available | 2014-12-16T06:12:28Z | - |
dc.date.issued | 2011-03-01 | en_US |
dc.identifier.govdoc | G06K019/07 | zh_TW |
dc.identifier.govdoc | H01F017/04 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/103641 | - |
dc.description.abstract | 本發明係有關於一種晶片電感結構及其製造方法,其包含一基板、一多孔層、複數導體與一電感,多孔層設置於基板上方且有複數孔洞,該些導體分別設於該些孔洞,電感設置於多孔層上方。本發明藉由該些導體作為核心,如此可增加電感值,且可縮小晶片電感的面積,並降低生產成本,此外本發明之製造方法簡單,且相容於CMOS製程,而可降低生產成本。 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | 晶片電感結構及其製造方法 | zh_TW |
dc.type | Patents | en_US |
dc.citation.patentcountry | TWN | zh_TW |
dc.citation.patentnumber | 201108120 | zh_TW |
Appears in Collections: | Patents |
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