Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 吳奕緯 | en_US |
| dc.contributor.author | 田濱華 | en_US |
| dc.contributor.author | 鍾崇斌 | en_US |
| dc.contributor.author | 單智君 | en_US |
| dc.date.accessioned | 2014-12-16T06:13:02Z | - |
| dc.date.available | 2014-12-16T06:13:02Z | - |
| dc.date.issued | 2008-07-01 | en_US |
| dc.identifier.govdoc | G06F012/00 | zh_TW |
| dc.identifier.uri | http://hdl.handle.net/11536/103982 | - |
| dc.description.abstract | 本發明係揭露一種記憶裝置及其迴圈緩衝器(loop buffer)。在一實施例中,此迴圈緩衝器包含一緩衝記憶體單元及一分支目的緩衝區(BTB),緩衝記憶體單元可儲存最內層迴圈指令(innermost loop instruction),而分支目的緩衝區(BTB)可儲存此緩衝記憶體單元內之指令之追跡資料(track)。藉此,此迴圈緩衝器可儲存包含向前分支(forward branch)及函式(subroutine)之迴圈指令,以進一部減少指令提取之耗能。 | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.title | 記憶裝置及其迴圈緩衝器 | zh_TW |
| dc.type | Patents | en_US |
| dc.citation.patentcountry | TWN | zh_TW |
| dc.citation.patentnumber | 200828012 | zh_TW |
| Appears in Collections: | Patents | |
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