| 標題: | Enhanced tunnel field effect transistor |
| 作者: | Wang Pei-Yu Tsui Bing-Yue |
| 公開日期: | 7-十月-2014 |
| 摘要: | An enhanced tunnel field effect transistor includes a substrate, a layer of P-I-N structure, a hetero-material layer, a gate dielectric layer, a gate structure and a spacer, in which the layer of P-I-N structure is disposed on the substrate, the hetero-material layer is disposed on portion of the layer of P-I-N structure, the gate dielectric layer is disposed on the hetero-material layer, the gate structure is disposed the gate dielectric layer and a spacer is disposed on a sidewall of the hetero-material layer, the gate dielectric layer, and the gate structure. The hetero-material layer can increase the tunneling efficiency of the enhanced tunnel field effect transistor to increase the conductor current to improve the enhanced tunnel field effect transistor performance. |
| 官方說明文件#: | H01L021/70 H01L029/78 H01L029/10 |
| URI: | http://hdl.handle.net/11536/104337 |
| 專利國: | USA |
| 專利號碼: | 08853824 |
| 顯示於類別: | 專利資料 |

