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dc.contributor.authorChang Hua-Yuen_US
dc.contributor.authorJiang Hui-Ruen_US
dc.contributor.authorChang Yao-Wenen_US
dc.date.accessioned2014-12-16T06:13:50Z-
dc.date.available2014-12-16T06:13:50Z-
dc.date.issued2014-07-08en_US
dc.identifier.govdocG06F017/50zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/104363-
dc.description.abstractA method of implementing timing ECO in a circuit includes the steps of performing a static timing analysis on the circuit so as to determine at least one timing violating path of the circuit, decomposing the timing violating path into at least one violating path segment, determining a smooth curve from each timing violating path and determining a plurality of reference points along the smooth curve, computing a fixability parameter of each gate on the violating path segment, extracting at least one gate according to the fixability parameters, and selecting one spare cell and disposing the selected spare cell on the violating path segment.zh_TW
dc.language.isozh_TWen_US
dc.titleMethod of implementing timing engineering change orderzh_TW
dc.typePatentsen_US
dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber08776000zh_TW
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