完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Guo Jyh-Chyurn | en_US |
dc.contributor.author | Yeh Kuo-Liang | en_US |
dc.date.accessioned | 2014-12-16T06:13:52Z | - |
dc.date.available | 2014-12-16T06:13:52Z | - |
dc.date.issued | 2014-04-08 | en_US |
dc.identifier.govdoc | G01R031/26 | zh_TW |
dc.identifier.govdoc | H01L021/66 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/104394 | - |
dc.description.abstract | A parameter extraction method for semiconductor devices includes: providing a first multi-finger device and a second multi-finger device, wherein the gate-finger numbers between the first and second multi-finger devices are different; performing an open de-embedding, then the high-frequency test apparatus measuring a first intrinsic gate capacitance of the first multi-finger device and a second intrinsic gate capacitance of the second multi-finger device; calculating a slope according to the first and second intrinsic gate capacitances, and the first and second gate-finger numbers; performing a 3D capacitance simulation for computing the poly finger-end fringing capacitances; utilizing a long channel device for measuring the gate capacitance and extracting the intrinsic gate capacitance, then calculating an inversion channel capacitance per unit area; and computing a delta channel width of the semiconductor device, according to the slope, the poly finger-end fringing capacitance, and the inversion channel capacitance per unit area. | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | Parameter extraction method for semiconductor device | zh_TW |
dc.type | Patents | en_US |
dc.citation.patentcountry | USA | zh_TW |
dc.citation.patentnumber | 08691599 | zh_TW |
顯示於類別: | 專利資料 |