完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Yang Hao-I | en_US |
dc.contributor.author | Chuang Ching-Te | en_US |
dc.contributor.author | Hwang Wei | en_US |
dc.date.accessioned | 2014-12-16T06:14:04Z | - |
dc.date.available | 2014-12-16T06:14:04Z | - |
dc.date.issued | 2013-02-26 | en_US |
dc.identifier.govdoc | G11C005/14 | zh_TW |
dc.identifier.govdoc | G11C011/00 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/104504 | - |
dc.description.abstract | The present invention proposes a gate oxide breakdown-withstanding power switch structure, which is connected with an SRAM and comprises a first CMOS switch and a second CMOS switch respectively having different gate-oxide thicknesses or different threshold voltages. The CMOS switch, which has a normal gate-oxide thickness or a normal threshold voltage, provides current for the SRAM to wake up the SRAM from a standby or sleep mode to an active mode. The CMOS switch, which has a thicker gate-oxide thickness or a higher threshold voltage, provides current for the SRAM to work in an active mode. The present invention prevents a power switch from gate-oxide breakdown lest noise margin, stabilization and performance of SRAM be affected. | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | Gate oxide breakdown-withstanding power switch structure | zh_TW |
dc.type | Patents | en_US |
dc.citation.patentcountry | USA | zh_TW |
dc.citation.patentnumber | 08385149 | zh_TW |
顯示於類別: | 專利資料 |