標題: On-chip inductor structure and method for manufacturing the same
作者: Chao Tzu-Yuan
Hsu Ming-Chieh
Cheng Yu-Ting
Chen Chih
Lin Chien-Min
公開日期: 12-Feb-2013
摘要: The present invention relates to a an on-chip inductor structure and a method for manufacturing the same. The an on-chip inductor structure according to the present invention comprises a substrate, a porous layer, a plurality of conductors, and an inductor. The porous layer is disposed on the substrate and has a plurality of voids; each of the plurality of conductors is disposed in the plurality of voids, respectively; and the inductor is disposed on the porous layer. Because the plurality of conductors is used as the core of the inductor, the inductance is increased effectively and the area of the an on-chip inductor is reduced. Besides the manufacturing method according to the present invention is simple and compatible with the current CMOS process, the manufacturing cost can be lowered.
官方說明文件#: H01L027/08
URI: http://hdl.handle.net/11536/104511
專利國: USA
專利號碼: 08373250
Appears in Collections:Patents


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