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dc.contributor.authorChao Tzu-Yuanen_US
dc.contributor.authorHsu Ming-Chiehen_US
dc.contributor.authorCheng Yu-Tingen_US
dc.contributor.authorChen Chihen_US
dc.contributor.authorLin Chien-Minen_US
dc.date.accessioned2014-12-16T06:14:05Z-
dc.date.available2014-12-16T06:14:05Z-
dc.date.issued2013-02-12en_US
dc.identifier.govdocH01L027/08zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/104511-
dc.description.abstractThe present invention relates to a an on-chip inductor structure and a method for manufacturing the same. The an on-chip inductor structure according to the present invention comprises a substrate, a porous layer, a plurality of conductors, and an inductor. The porous layer is disposed on the substrate and has a plurality of voids; each of the plurality of conductors is disposed in the plurality of voids, respectively; and the inductor is disposed on the porous layer. Because the plurality of conductors is used as the core of the inductor, the inductance is increased effectively and the area of the an on-chip inductor is reduced. Besides the manufacturing method according to the present invention is simple and compatible with the current CMOS process, the manufacturing cost can be lowered.zh_TW
dc.language.isozh_TWen_US
dc.titleOn-chip inductor structure and method for manufacturing the samezh_TW
dc.typePatentsen_US
dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber08373250zh_TW
Appears in Collections:Patents


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