標題: Address generation apparatus and method for quadratic permutation polynomial interleaver de-interleaver
作者: Lee Shuenn-Gi
Wang Chung-Hsuan
Sheen Wern-Ho
公開日期: 11-Dec-2012
摘要: An address generation apparatus for a quadratic permutation polynomial (QPP) interleaver is provided. It comprises a basic recursive unit, and L recursive units represented by first recursive unit up to Lth recursive units. The apparatus inputs a plurality of configurable parameters according to a QPP function Π(i)=(f1i+f2i2) mod k, generates a plurality of interleaver addresses in serial via the basic recursive unit, and generates L groups of corresponding interleaver addresses via the first up to the Lth recursive units, wherein Π(i) is the i-th interleaver address generated by the apparatus, f1 and f2 are QPP coefficients, and k is information block length of an input sequence, 0≦i≦k−1.
官方說明文件#: G01R031/28
G06F011/00
G06F012/00
G06F009/26
G06F009/34
G06F012/06
G06F013/00
G06F013/28
URI: http://hdl.handle.net/11536/104525
專利國: USA
專利號碼: 08332701
Appears in Collections:Patents


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