標題: Power gating structure having data retention and intermediate modes
作者: Hua
Chung-Hsien
Hwang
Wei
公開日期: 13-Mar-2007
摘要: The present invention provides a power gating structure having data retention and intermediate modes and able to operate under multiple modes. A conventional power gating structure has only turn-on and turn-off functions, and is used to suppress a leakage current problem which has become more and more serious in advance manufacture processes, under a turn-off mode. However, in a memory circuit, such as latch, register and SRAM, when the power gate is turned off, a new power gating structure is required for data retention. The power gating structure of the present invention can be set into one of 4 different operational modes: a data retention mode for maintaining the static noise margin of the memory, an intermediate mode for reducing the interference on ground and power levels, an active mode used when the circuit operates in normal condition, and a standby mode used when the circuit does not operate.
官方說明文件#: H03K017/16
H03K019/003
H03K019/0175
URI: http://hdl.handle.net/11536/104794
專利國: USA
專利號碼: 07190187
Appears in Collections:Patents


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