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dc.contributor.authorLIU Po-Tsunen_US
dc.contributor.authorCHU Li-Weien_US
dc.contributor.authorZHENG Guang-Tingen_US
dc.date.accessioned2014-12-16T06:14:53Z-
dc.date.available2014-12-16T06:14:53Z-
dc.date.issued2013-12-05en_US
dc.identifier.govdocH01L027/12zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/104973-
dc.description.abstractThe present invention provides an analog memory cell circuit for the LTPS TFT-LCD. The circuit comprises the first transistor, second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the capacitor. It comprises a plurality of operation period, wherein the transistors are controlled in accordance with the first scan signal, the second scan signal, and the third scan signal, the output signal is output in the opposite to the output jack.zh_TW
dc.language.isozh_TWen_US
dc.titleAnalog Memory Cell Circuit for the LTPS TFT-LCDzh_TW
dc.typePatentsen_US
dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber20130320348zh_TW
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