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dc.contributor.authorHOU TUO-HUNGen_US
dc.contributor.authorWU SHIH-CHIEHen_US
dc.date.accessioned2014-12-16T06:15:00Z-
dc.date.available2014-12-16T06:15:00Z-
dc.date.issued2013-05-16en_US
dc.identifier.govdocH01L045/00zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/105052-
dc.description.abstractThis invention proposes a multi-bit resistive-switching memory cell and array thereof. Multiple conduction paths are formed on each memory cell and independent of each other, and each conduction path can be in a high-resistance or low-resistance state, so as to form a multi-bit resistive-switching memory cell. A memory cell array can be formed by arranging a plurality of multi-bit resistive-switching memory cells, and the memory cell array provides a simple, high density, high performance and cost-efficient proposal.zh_TW
dc.language.isozh_TWen_US
dc.titleMULTI-BIT RESISTIVE-SWITCHING MEMORY CELL AND ARRAYzh_TW
dc.typePatentsen_US
dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber20130119340zh_TW
Appears in Collections:Patents


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