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dc.contributor.author周芳鼎en_US
dc.contributor.author洪崇智en_US
dc.date.accessioned2014-12-16T06:15:04Z-
dc.date.available2014-12-16T06:15:04Z-
dc.date.issued2013-10-01en_US
dc.identifier.govdocH03K005/14zh_TW
dc.identifier.govdocH03M001/66zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/105108-
dc.description.abstract本發明係揭露一種數位類比轉換裝置,包含一可變延遲緩衝電路與複數同步電路,緩衝電路接收一具複數位元之數位訊號,並依據上述位元從高至低之順序,分別對應依序延緩輸出一第一互補數位訊號組。每一同步電路分別接收每一第一互補數位訊號組與一時脈訊號,並以時脈訊號作為第一互補數位訊號組之時間基準,進而分別對應每一第一互補數位訊號組,輸出每一第二互補數位訊號組至一數位類比轉換單元,以將第二互補數位訊號組轉換為一類比訊號輸出。本發明利用不同輸入位元所對應的延遲時間,以控制電流開關的時序,進而降低暫態突波。zh_TW
dc.language.isozh_TWen_US
dc.title數位類比轉換裝置zh_TW
dc.typePatentsen_US
dc.citation.patentcountryTWNzh_TW
dc.citation.patentnumberI411233zh_TW
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