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dc.contributor.authorCHIOU, Bi Shiouen_US
dc.contributor.authorCHANG, Li Chunen_US
dc.contributor.authorHO, Chia Chengen_US
dc.contributor.authorLEE, Dai Yingen_US
dc.contributor.authorSHEN, Yu Shuen_US
dc.date.accessioned2014-12-16T06:15:45Z-
dc.date.available2014-12-16T06:15:45Z-
dc.date.issued2009-10-01en_US
dc.identifier.govdocH01L029/15zh_TW
dc.identifier.govdocH01L021/20zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/105482-
dc.description.abstractThe invention discloses a memory device and method thereof. The memory device comprises a substrate, an insulator layer, a first conducting layer, a CaCu3Ti4O12 resistor layer and a second conducting layer. The insulator layer is formed over the substrate. The first conducting layer is formed over the insulator layer. The CaCu3Ti4O12 resistor layer is formed over the first conducting layer. The second conducting layer is formed over the CaCu3Ti4O12 resistor layer. In manufacturing, firstly, a substrate is provided. Then, a resistor layer is formed on the substrate. Next, a first conducting layer is formed on the resistor layer. Afterward, a CaCu3Ti4O12 resistor layer is formed on the first conducting layer by utilizing sol-gel method. Finally, a second conducting layer is formed on the CaCu3Ti4O12 resistor layer. The invention not only satisfies a requirement of low driving voltage in electronic product but also increases reliability and compatibility even cost is diminished.zh_TW
dc.language.isozh_TWen_US
dc.titleMEMORY DEVICE AND METHOD OF MANUFACTURING THE SAMEzh_TW
dc.typePatentsen_US
dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber20090242900zh_TW
Appears in Collections:Patents


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