完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | WONG, Cheng-Chi | en_US |
dc.contributor.author | LEE, Yung-Yu | en_US |
dc.contributor.author | LAI, Ming-Wei | en_US |
dc.contributor.author | LIN, Chien-Ching | en_US |
dc.contributor.author | CHANG, Hsie-Chia | en_US |
dc.contributor.author | LEE, Chen-Yi | en_US |
dc.date.accessioned | 2014-12-16T06:15:49Z | - |
dc.date.available | 2014-12-16T06:15:49Z | - |
dc.date.issued | 2009-06-25 | en_US |
dc.identifier.govdoc | H03M007/00 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/105521 | - |
dc.description.abstract | An apparatus and method of multi-stage network for iterative network are disclosed. The apparatus has M stages, and each stage uses N multiplexers to transmit N codeword partitions simultaneously. Every starting terminal, either the output port of memories, soft-in soft-out decoders, or multiplexers, has two paths to couple with two different multiplexers at next stage. One path connects the source to the first data port of one multiplexer; the other connects the source to the second data port of another multiplexer. The two multiplexers will be controlled with the same 1-bit signal, so each source has only one valid path to next stage. The invention can guarantee that the transmission of N data blocks is free from contention. | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | APPARATUS OF MULTI-STAGE NETWORK FOR ITERATIVE DECODING AND METHOD THEREOF | zh_TW |
dc.type | Patents | en_US |
dc.citation.patentcountry | USA | zh_TW |
dc.citation.patentnumber | 20090160686 | zh_TW |
顯示於類別: | 專利資料 |