Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Huang, Po-Tsang | en_US |
dc.contributor.author | Hwang, Wei | en_US |
dc.contributor.author | Chang, Shu-Wei | en_US |
dc.date.accessioned | 2014-12-16T06:15:56Z | - |
dc.date.available | 2014-12-16T06:15:56Z | - |
dc.date.issued | 2008-07-24 | en_US |
dc.identifier.govdoc | G06F012/00 | zh_TW |
dc.identifier.govdoc | G11C015/04 | zh_TW |
dc.identifier.govdoc | G06F013/00 | zh_TW |
dc.identifier.govdoc | G06F013/28 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/105582 | - |
dc.description.abstract | The present invention discloses a butterfly match-line structure and a search method implemented thereby, wherein the parallelism of the match lines is increased to shorten the search time, and a butterfly-type connection is used to reduce the power consumption and achieve the best energy efficiency. Via the butterfly-type connection, information can be reciprocally transmitted between the parallel match lines, which are independent originally. When a miss case occurs, more succeeding memory cells will not be compared but will be turned off. Thereby, the power consumption is reduced. Further, XOR-based conditional keepers are used to reduce the matching time and the power consumption. Besides, such a circuit is also used to shorten the delay time of the butterfly-type connection. | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | BUTTERFLY MATCH-LINE STRUCTURE AND SEARCH METHOD IMPLEMENTED THEREBY | zh_TW |
dc.type | Patents | en_US |
dc.citation.patentcountry | USA | zh_TW |
dc.citation.patentnumber | 20080177944 | zh_TW |
Appears in Collections: | Patents |
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