實現在40奈米製程下可應用於IP位址搜尋之高能源效益三態內容可定址記憶體電路設計

Abstract

即便三元內容可定址記憶體是個大功耗的晶片系統設計，但仍被廣泛地應用在IP位址搜尋之功能上。在本論文中，提出了實現在40奈米製程下高能源效益的可定址記憶體電路設計。由於先進製程底下N極電晶體的導通電流小，在16電晶體三元內容可定址記憶體中，我們採用P極的比較電路來增加動態電路的導通電流。另外，使用AND閘連接的蝴蝶式比較線連結架構不僅能降低動態節點的導線電容，也能確保每一子節的動態節點電容量為相同。為了進一步降低功率的消耗，我們提出了漣波位元線讀取架構及漣波比較傳輸架構，並且結合可定址記憶體內無關項的特性。比起傳統階層式架構，它同時降低了比較傳輸線的切換功率也節省了位元線和比較傳輸線的長導線電容。此外，我們提出了垂直式資料感測電路來加強寫入能力；另一方面，藉由無關項特性的動態電源電路設計來縮減漏電流和提高靜態雜訊邊界。寫入時，為了避免所儲存的資料被破壞及提升資料感測控制電路對環境變異的穩定性，在我們設計當中也提供了複製電路來控制動態電源的開關時間。建立在40奈米製程上，我們結合這多項低功耗電路架構實現在256x40和256x144的三元內容可定址記憶體中。經由電路佈局後的模擬顯示，操作在400百萬赫茲及1伏特電壓底下，可省28.9％的漏電功耗和31.74%的比較傳輸線功耗，並且平均每個可定址記憶體也只消耗0.461飛焦耳。

Ternary content addressable memory (TCAM) is extensively adopted in routing tables of network systems and occupied great amounts of energy consumption. In this thesis, energy-efficient TCAM macros have been designed and realized in 40nm LP CMOS process with the sizes of 256x40 and 256x144, respectively. Based on the small drain current in 40nm LP CMOS process, a 16T AND-type TCAM cell with p-type comparison circuits is utilized to increase the Ion/Ioff ratio of the dynamic circuitry. Additionally, the butterfly match-line scheme with AND gates is designed to reduce the wire loading on the evaluation nodes and to ensure that the capacitance of the evaluation nodes are the same in all segments. For further reducing the energy consumption in nano-scale technologies, don’t-care-based ripple search-line and ripple bit-lines are realized to decrease both the switching activities and wire capacitance of search-lines and bit-lines. Moreover, the column-based data-aware power control is also employed to realize the leakage power reduction, write-ability and static noise margin (SNM) improvements by the power gating devices. Consequently, the timing of the power switching is tolerant to PVT variation and Vt scatter by the replica circuitry. The energy-efficient 256x40 and 256x144 TCAM macros are implemented using UMC 40nm LP CMOS technology, and the experimental results demonstrate a leakage power reduction of 28.9%, a search-line power reduction of 31.74% and an energy metric of the TCAM macro of 0.461 fJ/bit/search.