Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 華重憲 | en_US |
dc.contributor.author | 彭奇偉 | en_US |
dc.contributor.author | 黃威 | en_US |
dc.date.accessioned | 2014-12-16T06:17:00Z | - |
dc.date.available | 2014-12-16T06:17:00Z | - |
dc.date.issued | 2008-04-11 | en_US |
dc.identifier.govdoc | G11C015/00 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/106234 | - |
dc.description.abstract | 本發明係提供一種互斥狀態保持器(XOR-based conditional keeper)及其應用於比對線(match line)架構。本發明係以設置於狀態保持器內之互斥閘接收一與內容定址記憶胞(content addressable memory cell,CAM cell)組同步之時序訊號,並配合由浮動節點傳入之浮動訊號,產生一互斥控制訊號且傳入一P型電晶體中,以產生一資料訊號用以控制互斥狀態保持器,使此互斥狀態保持器得以在不同狀態下,恰當地執行相對應之作動,以取代單純僅有開與關之兩種模式,更將此互斥狀態保持器應用於內容定址記憶體中動態的比對線架構中,以使此動態比對線可達到兼具高抗雜訊能力、低功率損耗以及高處理速度之特性。同時,本發明中的互斥狀態保持器係可適用於所有動態電路(dynamic circuit),尤其是高扇入電路(high fan-in circuit)之應用。 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | 互斥狀態保持器(XOR-based conditional keeper)及其應用於比對線(match line)架構 | zh_TW |
dc.type | Patents | en_US |
dc.citation.patentcountry | TWN | zh_TW |
dc.citation.patentnumber | I295802 | zh_TW |
Appears in Collections: | Patents |
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