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dc.contributor.authorChang, Kow Mingen_US
dc.contributor.authorLin, Gin Minen_US
dc.contributor.authorChen, Cheng Guoen_US
dc.contributor.authorHsieh, Mon Fanen_US
dc.date.accessioned2014-12-08T15:15:02Z-
dc.date.available2014-12-08T15:15:02Z-
dc.date.issued2007-01-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2006.887933en_US
dc.identifier.urihttp://hdl.handle.net/11536/11303-
dc.description.abstractIn this letter, a novel structure of polycrystalline-silicon thin-film transistors (TFTs) with self-aligned raised source/drain (SARSD) and a thin channel has been developed and investigated. In the proposed structure, a thick SD and a thin active region could be achieved with only four mask steps, which are less than that in conventional raised SD TFTs. The proposed SARSD TFT has a higher ON-state current and a lower OFF-state leakage current. Moreover, the ON/OFF current ratio of the proposed SARSD TFT is also higher than that of a conventional coplanar TFT.en_US
dc.language.isoen_USen_US
dc.subjectfour masksen_US
dc.subjectON/OFF current ratioen_US
dc.subjectpolycrystalline-silicon thin-film transistor (poly-Si TFT)en_US
dc.subjectself-aligned raised source/drain (SARSD)en_US
dc.subjectthin channelen_US
dc.titleA novel four-mask-step low-temperature polysilicon thin-film transistor with self-aligned raised source/drain (SARSD)en_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2006.887933en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume28en_US
dc.citation.issue1en_US
dc.citation.spage39en_US
dc.citation.epage41en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000243280900014-
dc.citation.woscount6-
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