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dc.contributor.authorChen, Chih-Yangen_US
dc.contributor.authorLee, Jam-Wemen_US
dc.contributor.authorMa, Ming-Wenen_US
dc.contributor.authorChen, Wei-Chengen_US
dc.contributor.authorLin, Hsiao-Yien_US
dc.contributor.authorYeh, Kuan-Linen_US
dc.contributor.authorWang, Shen-Deen_US
dc.contributor.authorLei, Tan-Fuen_US
dc.date.accessioned2014-12-08T15:15:06Z-
dc.date.available2014-12-08T15:15:06Z-
dc.date.issued2007en_US
dc.identifier.issn0013-4651en_US
dc.identifier.urihttp://hdl.handle.net/11536/11337-
dc.identifier.urihttp://dx.doi.org/10.1149/1.2742810en_US
dc.description.abstractThe degradation mechanisms of both negative bias temperature instability (NBTI) and positive bias temperature instability (PBTI) were studied for low-temperature polycrystalline silicon complementary thin-film transistors. Measurements show that both NBTI and PBTI are highly bias dependent; however, the effect of the temperature is only functional on the NBTI stress. Furthermore, instead of interfacial trap-state generation during the NBTI stress, the PBTI stress passivates the interface trap states. We conclude that the diffusion-controlled electrochemical reactions dominate the NBTI degradation while charge trapping in the gate dielectric controls the PBTI degradation. (c) 2007 The Electrochemical Society.en_US
dc.language.isoen_USen_US
dc.titleBias temperature instabilities for low-temperature polycrystalline silicon complementary thin-film transistorsen_US
dc.typeArticleen_US
dc.identifier.doi10.1149/1.2742810en_US
dc.identifier.journalJOURNAL OF THE ELECTROCHEMICAL SOCIETYen_US
dc.citation.volume154en_US
dc.citation.issue8en_US
dc.citation.spageH704en_US
dc.citation.epageH707en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000247572100068-
dc.citation.woscount10-
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