ESD robustness of thin-film devices with different layout structures in LTPS technology

doi:10.1016/j.microrel.2006.01.008

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DC 欄位	值	語言
dc.contributor.author	Deng, Chih-Kang	en_US
dc.contributor.author	Ker, Ming-Dou	en_US
dc.date.accessioned	2014-12-08T15:15:20Z	-
dc.date.available	2014-12-08T15:15:20Z	-
dc.date.issued	2006-12-01	en_US
dc.identifier.issn	0026-2714	en_US
dc.identifier.uri	http://dx.doi.org/10.1016/j.microrel.2006.01.008	en_US
dc.identifier.uri	http://hdl.handle.net/11536/11504	-
dc.description.abstract	The electrostatic discharge (ESD) robustness of different thin-film devices, including three diodes and two thin-film transistors (TFTs) in low-temperature polysilicon (LTPS) technology, is investigated. By using the transmission line pulse generator (TLPG), the high-current characteristics and the secondary breakdown current (It2) of these thin-film devices are observed. The experimental results with different parameters and layout structures of these LTPS thin-film devices have been evaluated for optimizing ESD protection design for liquid crystal display (LCD) panel. (c) 2006 Elsevier Ltd. All rights reserved.	en_US
dc.language.iso	en_US	en_US
dc.title	ESD robustness of thin-film devices with different layout structures in LTPS technology	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1016/j.microrel.2006.01.008	en_US
dc.identifier.journal	MICROELECTRONICS RELIABILITY	en_US
dc.citation.volume	46	en_US
dc.citation.issue	12	en_US
dc.citation.spage	2067	en_US
dc.citation.epage	2073	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000241465400012	-
dc.citation.woscount	0	-
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