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dc.contributor.authorJenq, Shrine Ningen_US
dc.contributor.authorWan, Chi Chaoen_US
dc.contributor.authorWang, Yung Yunen_US
dc.contributor.authorLi, Hung Weien_US
dc.contributor.authorLiu, Po Tsunen_US
dc.contributor.authorChen, Jing Honen_US
dc.date.accessioned2014-12-08T15:15:33Z-
dc.date.available2014-12-08T15:15:33Z-
dc.date.issued2006-11-01en_US
dc.identifier.issn0021-4922en_US
dc.identifier.urihttp://dx.doi.org/10.1143/JJAP.45.L1215en_US
dc.identifier.urihttp://hdl.handle.net/11536/11636-
dc.description.abstractThe fabrication of Cu gates for thin-film transistors (TFTs) by electrodeposition through mask on a Ni layer has been developed. After pretreatment in acid sulfate solution, a Cu deposit acquires the property of good adhesion on a Ni layer. Organic additives [e.g., poly(ethylene glycol) (PEG), bis(3-sodiumsulfopropyl) disulfide (SPS)] were used to create the desired tapered shape of the deposited Cu pattern on a Ni layer. Furthermore, a multilayer Cu gate for TFTs was fabricated after the selective etching of the nickel layer. The new method provides an alternative wet process for fabricating Cu gates for TFTs.en_US
dc.language.isoen_USen_US
dc.subjectCuen_US
dc.subjectacid pretreatmenten_US
dc.subjectelectrodepositionen_US
dc.subjectNi seed layeren_US
dc.subjectthin-film transistorsen_US
dc.titleForming tapered pattern by Cu electrodeposition through mask on Ni seed layer for thin-film transistorsen_US
dc.typeArticleen_US
dc.identifier.doi10.1143/JJAP.45.L1215en_US
dc.identifier.journalJAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERSen_US
dc.citation.volume45en_US
dc.citation.issue42-45en_US
dc.citation.spageL1215en_US
dc.citation.epageL1218en_US
dc.contributor.department顯示科技研究所zh_TW
dc.contributor.departmentInstitute of Displayen_US
dc.identifier.wosnumberWOS:000242567400033-
dc.citation.woscount1-
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