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dc.contributor.authorCheng, Chao-Chingen_US
dc.contributor.authorChien, Chao-Hsinen_US
dc.contributor.authorLin, Je-Hungen_US
dc.contributor.authorChang, Chun-Yenen_US
dc.contributor.authorLuo, Guang-Lien_US
dc.contributor.authorYang, Chun-Huien_US
dc.contributor.authorHsu, Shih-Luen_US
dc.date.accessioned2014-12-08T15:16:12Z-
dc.date.available2014-12-08T15:16:12Z-
dc.date.issued2006-07-03en_US
dc.identifier.issn0003-6951en_US
dc.identifier.urihttp://dx.doi.org/10.1063/1.2219347en_US
dc.identifier.urihttp://hdl.handle.net/11536/12040-
dc.description.abstractWe have studied the thermochemical characteristics of ZrOx(N-y)/Ge and Si interfaces by employing postdeposition annealing. We found that Ge oxide species severely desorbed from the inherent interfacial layer, which was speculated to retard the formation of Zr germanate during high-temperature processing. These unique features enable ZrOx(N-y)/Ge gate stack to show a better equivalent-oxide-thickness scalability as compared to ZrOx(N-y)/Si gate stack. However, the volatilization of GeOx-contained interfacial layer also caused the formation of small pits and/or holes in the overlying ZrOx(N-y) gate dielectrics, which was expected to cause deterioration in the electrical properties of fabricated high-k/Ge devices. (c) 2006 American Institute of Physics.en_US
dc.language.isoen_USen_US
dc.titleThermochemical reaction of ZrOx(N-y) interfaces on Ge and Si substratesen_US
dc.typeArticleen_US
dc.identifier.doi10.1063/1.2219347en_US
dc.identifier.journalAPPLIED PHYSICS LETTERSen_US
dc.citation.volume89en_US
dc.citation.issue1en_US
dc.citation.epageen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.department奈米中心zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.contributor.departmentNano Facility Centeren_US
dc.identifier.wosnumberWOS:000238849200049-
dc.citation.woscount8-
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