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dc.contributor.authorChang, Hsiao-Enen_US
dc.contributor.authorHuang, Juinn-Daren_US
dc.contributor.authorChen, Chia-Ien_US
dc.date.accessioned2014-12-08T15:16:33Z-
dc.date.available2014-12-08T15:16:33Z-
dc.date.issued2007en_US
dc.identifier.isbn978-1-4244-0582-4en_US
dc.identifier.urihttp://hdl.handle.net/11536/12235-
dc.description.abstractWith the advent of portable devices, power consumption becomes one of the most important considerations in VLSI designs. Multiplexer (WX) is a basic component massively used in typical VLSI designs. In this paper, we focus on the minimization of switching activities in a MUX tree composed of 2-to-1 MUXes. The key contribution of this paper is: Given the on probabilities and the selection probabilities of input data signals, the proposed heuristic algorithm can properly encode all input data signals such that the power consumption of the resultant MUX tree is minimized. For a 64-to-1 MUX, the experimental results show that a MUX tree encoded by the proposed algorithm consumes 24% less power than a randomly-encoded tree on average.en_US
dc.language.isoen_USen_US
dc.titleInput selection encoding for low power multiplexer treeen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), Proceedings of Technical Papersen_US
dc.citation.spage228en_US
dc.citation.epage231en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000247000000057-
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