完整後設資料紀錄
DC 欄位語言
dc.contributor.authorLee Chen-Yien_US
dc.contributor.authorSung Wei-Haoen_US
dc.contributor.authorLee Ming-Cheen_US
dc.date.accessioned2015-05-12T02:59:39Z-
dc.date.available2015-05-12T02:59:39Z-
dc.date.issued2015-02-03en_US
dc.identifier.govdocH03K003/356zh_TW
dc.identifier.govdocH03K003/012zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/122824-
dc.description.abstractA pulse-based flip-flop that latches a data input signal to convert the data input signal into a data output signal in response to a first clock signal and the second clock signal. The pulse-based flip-flop includes a pulse generator and a data latch. The pulse generator includes a first inverter and a signal delay circuit to receive the first clock signal and generate the second clock signal; the data latch includes a delivery circuit, a latch circuit and a control circuit. The data latch is used to latch the data input signal and output the data output signal in response to the first and the second clock signals.zh_TW
dc.language.isozh_TWen_US
dc.titlePulse-based flip flopzh_TW
dc.typePatentsen_US
dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber08947146zh_TW
顯示於類別:專利資料


文件中的檔案:

  1. 08947146.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。