標題: | Investigation of Multi-V-th Efficiency for Trigate GeOI p-MOSFETs Using Analytical Solution of 3-D Poisson\'s Equation |
作者: | Wu, Shu-Hua Yu, Chang-Hung Chiang, Chun-Hsien Su, Pin 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | GeOI;multi-V-th design;multigate MOSFET;SOI;subthreshold;trigate MOSFET |
公開日期: | 1-一月-2015 |
摘要: | This paper provides an analytical subthreshold model for trigate MOSFETs with thin buried oxide (BOX) for multithreshold (multi-V-th) applications. This model shows a fairly good scalability in substrate bias and BOX thickness, which is crucial to the prediction of multi-Vth modulation through BOX. In addition, we demonstrate the application of our model in multi-V-th device design for trigate GeOI p-MOSFETs with the body-effect coefficient (gamma) over a wide range of design space efficiently examined. We have shown an enhanced multi-Vth modulation behavior in trigate GeOI p-MOSFETs. Our study indicates that, for a given subthreshold swing and gamma, the GeOI trigate p-MOSFET can possess a higher fin aspect ratio than the SOI counterpart. |
URI: | http://dx.doi.org/10.1109/TED.2014.2375871 http://hdl.handle.net/11536/124040 |
ISSN: | 0018-9383 |
DOI: | 10.1109/TED.2014.2375871 |
期刊: | IEEE TRANSACTIONS ON ELECTRON DEVICES |
Volume: | 62 |
起始頁: | 88 |
結束頁: | 93 |
顯示於類別: | 期刊論文 |