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dc.contributor.authorAdak, Sarosijen_US
dc.contributor.authorSarkar, Arghyadeepen_US
dc.contributor.authorSwain, Sanjiten_US
dc.contributor.authorPardeshi, Hemanten_US
dc.contributor.authorPati, Sudhansu Kumaren_US
dc.contributor.authorSarkar, Chandan Kumaren_US
dc.date.accessioned2015-07-21T11:20:33Z-
dc.date.available2015-07-21T11:20:33Z-
dc.date.issued2014-11-01en_US
dc.identifier.issn0749-6036en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.spmi.2014.07.036en_US
dc.identifier.urihttp://hdl.handle.net/11536/124128-
dc.description.abstractIn the present work, we propose and perform extensive simulation study of the novel device structure having a p-GaN back barrier layer inserted in the conventional AlInN/AlN/GaN Gate-Recessed Enhancement-Mode HEMT device for reducing the short channel effects, gate leakage and enhancing the frequency performance. The influence of the p-GaN back barrier layer on the device performance of the newly proposed structure is done using 2D Sentaurus TCAD simulations. The simulations use Drift Diffusion (DD) model, Masetti and Canali model, which are calibrated/validated with the previously published experimental results. Simulation are done to analyze the transfer characteristics, transconductance (g(m)), Gate leakage current (I-g), drain induced barrier lowering (DIBL), subthreshold slope (SS), threshold voltage (Vth), On-current Off-current ratio (I-on/l(off)), gate capacitance (C-gg) and cut off frequency (f(r)) of the proposed device. A comparison is done between the device without back barrier layer and the proposed device with p-GaN back barrier layer. Use of p-GaN back barrier layer helps to achieve a higher positive Vth due to the depletion effect, reduced I-g, reduced DIBL, prevents degradation of SS and helps to increase the f(T). Very impressive f(r) up to 123 GHz, as compared to 70 GHz for the device without back barrier. These results indicate that AlInN/AlN/GaN Gate-Recessed Enhancement-Mode HEMT structure with p-GaN back barrier is a promising candidate for microwave and switching application. (C) 2014 Elsevier Ltd. All rights reserved.en_US
dc.language.isoen_USen_US
dc.subjectp-GaN back barrieren_US
dc.subjectAlInN/GaNen_US
dc.subjectGate-Recessen_US
dc.subjectEnhancement-Mode HEMTen_US
dc.subjectCutoff frequencyen_US
dc.titleHigh performance AlInN/AlN/GaN p-GaN back barrier Gate-Recessed Enhancement-Mode HEMTen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.spmi.2014.07.036en_US
dc.identifier.journalSUPERLATTICES AND MICROSTRUCTURESen_US
dc.citation.volume75en_US
dc.citation.spage347en_US
dc.citation.epage357en_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.identifier.wosnumberWOS:000347017100037en_US
dc.citation.woscount0en_US
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