Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lu, CY | en_US |
dc.contributor.author | Lin, HC | en_US |
dc.contributor.author | Chang, YF | en_US |
dc.contributor.author | Huang, TY | en_US |
dc.date.accessioned | 2014-12-08T15:17:01Z | - |
dc.date.available | 2014-12-08T15:17:01Z | - |
dc.date.issued | 2006-04-01 | en_US |
dc.identifier.issn | 0021-4922 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1143/JJAP.45.3064 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/12459 | - |
dc.description.abstract | P-channel metal-oxide-semiconductor field-effect transistors (PMOSFETs) featuring poly-SiGe gates and compressive strain channels were investigated. The compressive strain in the channel was deliberately induced in this study by a plasmaenhanced chemical vapor deposition (PECVD) silicon nitride (SiN) capping layer over the gate. Our results indicate for the first time that, while strain channel engineefing serves as an effective method to enhance drive current for scaled complementary metal-oxide-scmiconductor (CMOS) devices consistent with literature reports, it also simultaneously aggravates the negative bias temperature instability (NBTI) of scaled devices. The aggravated NBTI behavior is ascfibed to a higher amount of hydrogen incorporation during SiN deposition as well as a higher strain energy stored in the channel. Saturation phenomena in the shift of threshold voltage and generation of interface states are observed at high stress temperatures and long stress times. Moreover, transconductance degradation in devices with SiN capping is greatly aggravated under high temperature stress. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | SiN capping | en_US |
dc.subject | compressive strain | en_US |
dc.subject | negative bias temperature instability (NBTI) | en_US |
dc.title | Device characteristics and aggravated negative bias temperature instability in p-channel metal-oxide-semiconductor field-effect transistors with uniaxial compressive strain | en_US |
dc.type | Article; Proceedings Paper | en_US |
dc.identifier.doi | 10.1143/JJAP.45.3064 | en_US |
dc.identifier.journal | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS | en_US |
dc.citation.volume | 45 | en_US |
dc.citation.issue | 4B | en_US |
dc.citation.spage | 3064 | en_US |
dc.citation.epage | 3069 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000237570600035 | - |
Appears in Collections: | Conferences Paper |
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