標題: | ILP-Based Alleviation of Dense Meander Segments With Prioritized Shifting and Progressive Fixing in PCB Routing |
作者: | Tseng, Tsun-Ming Li, Bing Ho, Tsung-Yi Schlichtmann, Ulf 交大名義發表 National Chiao Tung University |
關鍵字: | Dense meander segments;ILP model;printed circuit board (PCB) routing;speedup effect |
公開日期: | 1-六月-2015 |
摘要: | Length-matching is an important technique to balance delays of bus signals in high-performance printed circuit board (PCB) routing. Existing routers, however, may generate very dense meander segments. Signals propagating along these meander segments exhibit a speedup effect due to crosstalk between the segments of the same wire, thus leading to mismatch of arrival times even under the same physical wire length. In this paper, we present a post-processing method to enlarge the width and the distance of meander segments and hence distribute them more evenly on the board so that crosstalk can be reduced. In the proposed framework, we model the sharing of available routing areas after removing dense meander segments from the initial routing, as well as the generation of relaxed meander segments and their groups for wire length compensation. This model is transformed into an ILP problem and solved for a balanced distribution of wire patterns. In addition, we adjust the locations of long wire segments according to wire priorities to swap free spaces toward critical wires that need much length compensation. To reduce the problem space of the ILP model, we also introduce a progressive fixing technique so that wire patterns are grown gradually from the edge of the routing toward the center area. Experimental results show that the proposed method can expand meander segments significantly even under very tight area constraints, so that the speedup effect can be alleviated effectively in high-performance PCB designs. |
URI: | http://dx.doi.org/10.1109/TCAD.2015.2402657 http://hdl.handle.net/11536/124790 |
ISSN: | 0278-0070 |
DOI: | 10.1109/TCAD.2015.2402657 |
期刊: | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS |
Volume: | 34 |
起始頁: | 1000 |
結束頁: | 1013 |
顯示於類別: | 期刊論文 |