完整後設資料紀錄
DC 欄位語言
dc.contributor.authorHuang, Ryan H-Men_US
dc.contributor.authorWen, Charles H-Pen_US
dc.date.accessioned2015-07-21T08:31:19Z-
dc.date.available2015-07-21T08:31:19Z-
dc.date.issued2014-01-01en_US
dc.identifier.isbn978-1-4503-2730-5en_US
dc.identifier.issn0738-100Xen_US
dc.identifier.urihttp://hdl.handle.net/11536/124920-
dc.description.abstractSoft error rate (SER) has become a critical reliability issue for CMOS designs due to continuous technology scaling. However, the striking-time and multi-cycle effects have not been properly considered in SER for advanced CMOS designs. Therefore, in this paper, the striking-time and multicycle effects are formulated into the problem of SER estimation, and then a SER analysis framework is proposed, accordingly. Experimental results show that SERs on the benchmark circuits are seriously underestimated when ignoring both effects. Moreover, SERs increase more on those high-performance or low-power CMOS designs. New treatment to SER needs to be explored in the future.en_US
dc.language.isoen_USen_US
dc.subjectSoft erroren_US
dc.subjecttransient faulten_US
dc.titleAdvanced Soft-Error-Rate (SER) Estimation with Striking-Time and Multi-Cycle Effectsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2014 51ST ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC)en_US
dc.contributor.department電機資訊學士班zh_TW
dc.contributor.departmentUndergraduate Honors Program of Electrical Engineering and Computer Scienceen_US
dc.identifier.wosnumberWOS:000346506400024en_US
dc.citation.woscount0en_US
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