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| A 40nm 1.0Mb 6T Pipeline SRAM with Digital-Based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS Tracking and Adaptive Voltage Detector for Boosting Control | 14 |
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| 六月 2025 | 七月 2025 | 八月 2025 | 九月 2025 | 十月 2025 | 十一月 2025 | 十二月 2025 | |
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| A 40nm 1.0Mb 6T Pipeline SRAM with Digital-Based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS Tracking and Adaptive Voltage Detector for Boosting Control | 0 | 0 | 0 | 1 | 3 | 0 | 0 |
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