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dc.contributor.authorChen, Pei-Yuen_US
dc.contributor.authorVan, Lan-Daen_US
dc.contributor.authorReddy, Hari C.en_US
dc.contributor.authorKhoo, I-Hungen_US
dc.date.accessioned2015-07-21T08:30:52Z-
dc.date.available2015-07-21T08:30:52Z-
dc.date.issued2013-01-01en_US
dc.identifier.isbn978-1-4799-0434-1en_US
dc.identifier.issnen_US
dc.identifier.urihttp://hdl.handle.net/11536/125122-
dc.description.abstractIn this paper, two area-efficient two-dimensional (2-D) IIR filter architectures for 2-D transfer function with diagonal and four-fold rotational symmetries are proposed for image processing. For this purpose, two different intermediate transfer functions are applied and the corresponding two new filter architectures are obtained. Under satisfactory average error performance, we determine that the new filter structure requires less multiplier wordlength than the previously published Type-1 filter structure. With the features of less numerator multiplier wordlength and shorter critical path, the proposed diagonal and four-fold rotational symmetry filter architectures can result in 10.17% and 3.35% area reduction with respect to the published Type-1 IIR filter structures with diagonal and four-fold rotational symmetries in terms of synthesis results.en_US
dc.language.isoen_USen_US
dc.titleArea-Efficient 2-D Digital Filter Architectures Possessing Diagonal and Four-Fold Rotational Symmetriesen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2013 9TH INTERNATIONAL CONFERENCE ON INFORMATION, COMMUNICATIONS AND SIGNAL PROCESSING (ICICS)en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000353339000117en_US
dc.citation.woscount0en_US
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