標題: Symmetry Incorporated Cost-Effective Architectures for Two-Dimensional Digital Filters
作者: Van, Lan-Da
Khoo, I-Hung
Chen, Pei-Yu
Reddy, Haranatha (Hari) C.
交大名義發表
National Chiao Tung University
公開日期: 1-一月-2019
摘要: Professor Fettweis as far back as 1977 published a paper generalizing McClellan transformation to obtain circular symmetry in 2-D and spherical, hyper-spherical symmetries in multidimensional digital filters [1]. This survey paper presents state-of-the-art two-dimensional (2-D) VLSI digital filter architectures possessing various symmetries in the filter magnitude response. Preceding the symmetry structures, a generalized formulation is given that allows the derivation of various new 2-D VLSI filter structures of any order without global broadcast. Following this, two types (namely, Type 1 [20] and Type 3 [21], [25], [26]) of cost-effective 2-D magnitude symmetry filter architectures possessing diagonal, four-fold rotational, quadrantal, and octagonal symmetries with reduced number of multipliers are given. By combining the identities of the Types-1 and 3 symmetry filter structures, multimode 2-D symmetry filters which enable the above four symmetry modes are discussed. The Type-1 and Type-3 multimode filters can result in a 65.3% cost reduction in terms of number of multipliers compared with the sum of the multipliers of the four individual Type-1 symmetry filter structures studied in this paper. Furthermore, Type-3 has shorter critical path than Type-1 multimode filter. The paper is concluded with the presentation of a 2-D filter design example and a corresponding structure.
URI: http://dx.doi.org/10.1109/MCAS.2018.2872665
http://hdl.handle.net/11536/148878
ISSN: 1531-636X
DOI: 10.1109/MCAS.2018.2872665
期刊: IEEE CIRCUITS AND SYSTEMS MAGAZINE
Volume: 19
起始頁: 33
結束頁: 54
顯示於類別:期刊論文