標題: 整合薄膜電晶體及非揮發性浮動閘極記憶體的記憶體電晶體製備研究
A Study of Memory Transistor Comprised of Thin-film Transistor and Nonvolatile Floating Gate Memory
作者: 彭子瑄
Peng, Tzu-Hsuan
謝宗雍
Hsieh,Tsung-Eong
材料科學與工程學系所
關鍵字: 非揮發性浮動閘極記憶體;薄膜電晶體;TFT;Memory Transistor;NFGM
公開日期: 2015
摘要: 本研究整合銦鎵鋅氧化物薄膜電晶體(InGaZnO Thin-film Transistor,IGZO-TFT)及含銀銦銻碲(AgInSbTe)奈米複合薄膜之載子儲存層的非揮發性浮動閘極記憶體(Nonvolatile Floating Gate Memory,NFGM)製作1T1C(1-Transistor-and-1-Capacitor)元件結構的記憶體電晶體(Memory Transistor,MT),最終完成一全透明MT元件及其電性質、微觀結構與組成分析。實驗的第一部份以Si基板及熱氧化法長成SiO2閘極控制層,並以Al為上電極確認此一結構的可行性,第二部份以FTO玻璃為基板、以電漿輔助化學氣相沉積(Plasma-enhanced Chemical Vapor Deposition)沉積SiNx/SiO2複合閘極控制層並調變其膜層結構及退火研究製成MT元件,此一部分發現閘極控制層為SiNx(10 nm)/SiO2(90 nm)的試片經200°C/60 sec退火後具備最佳的電性:Ig = 0.11 A、VTH = 2 V、On/Off Ratio = 4.3×104、sat = 8.2 cm2V−1sec−1、SS = 2.5 Vdecade−1、VTH,MT = 8.7 V,且擁有良好資料保存能力。第三部份研究係以Mo/ITO取代第二部份完成的MT元件的Al為上電極製成全透明MT元件,經200°C/60 sec退火所得元件之電性質為:Ig = 0.68 A、VTH = 3.8 V、On/Off Ratio = 6.5×102、sat = 0.38 cm2V−1sec−1、SS = 4.8 Vdecade−1、VTH,MT = 2.4 V,電性質較差的主要原因為Mo與IGZO界面之接觸電阻(Contact Resistance,Rc)較大所致,整體MT元件在可見光波段則有70%之光穿透度。X光電子能譜儀(X-ray Photoelectron Spectroscopy)分析顯示退火可有效降低膜層之缺陷而提昇電性質,退火溫度過高會導致NFGM中的Sb氧化而使得電性質劣化。
Preparation and characterizations of the memory transistor (MT) with 1-transistor-and-1-capacitor device structure by combining the InGaZnO (IGZO) thin-film transistor and the nonvolatile floating gate memory (NFGM) containing AgInSbTe (AIST)-SiO2 nanocomposite layer as the charge storage layer are investigated. First, Si wafer as the substrate and thermally grown SiO2 gate dielectric layer were utilized to prepare MT sample in order to verify that the feasibility of IGZO TFT and AIST NFGM to MT architecture. Secondly, the FTO glass substrate and SiNx/SiO2 composite gate dielectric grown by plasma-enhanced chemical vapor deposition were adopted for MT preparation. It was found that, with an annealing at 200C for 60 sec, MT sample containing SiNx(10 nm)/SiO2(90 nm) composite gate dielectric structure exhibits the best electrical properties of Ig = 0.11 A, VTH = 2 V, on/off ratio = 4.3×104, sat = 8.2 cm2V−1sec−1, SS = 2.5 Vdecade−1 and VTH,MT = 8.7. In addition, a fairly good retention property of 22.7% degradation of memory window (VTH,MT) was observed after the retention test for 104 sec. In third part of study, the source/drain electrodes of MT samples accomplished previously were replaced by Mo/ITO layer so as to fabricate the fully transparent MT device. With an about 70% transparency in visible-light wavelength range, the MT device somehow exhibited an inferior electrical performance compared with the device with Al as the electrodes, i.e., Ig = 0.68 A, VTH = 3.8 V, On/Off Ratio = 6.5×102, sat = 0.38 cm2V−1sec−1, SS = 4.8 Vdecade−1, VTH,MT = 2.4 V. The degradation of electrical properties was ascribed to the increment of contact resistance at the interface of Mo and IGZO. X-ray photoelectron spectroscopy revealed the annealing at 200C might effectively reduce the crystalline defects in the samples and improve the electrical properties; nevertheless, the annealing at 300C caused the oxidization of Sb in AIST nanocrystals and jeopardized the memory capability of MT samples.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT070051516
http://hdl.handle.net/11536/125495
Appears in Collections:Thesis