Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Shih-Chung Kuan | en_US |
dc.contributor.author | 莊仁輝 | en_US |
dc.contributor.author | Jen-Hui Chuang | en_US |
dc.date.accessioned | 2015-11-26T00:55:38Z | - |
dc.date.available | 2015-11-26T00:55:38Z | - |
dc.date.issued | 1911 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#T870394051 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/125922 | - |
dc.description.abstract | 快取記憶體利用減少平均記憶體存取的延遲來增加多處理器的效能,不過快取記憶體在多處理器的環境底下會導致資料一致性的問題。快取記憶體資料一致性協定利用保存每一份區塊內的資料彼此間的一致性來解決資料一致性之問題,但其缺點是此種協定會增加額外的網路傳輸。本篇論文提出了一個由有限目錄之快取記憶體資料一致性的協定為基礎所延伸出新的資料一致性協定。除了原有的有限目錄外,我們還加入了兩個較小的目錄池稱為階層一和階層二和兩個歪斜函數。每當一個資料的目錄使用殆盡,接下來讀/寫這塊資料的處理器號碼將會利用不同的歪斜函數分別被存在不同階層中。增加的目錄池能較佳的儲存更多的讀取記錄,因此能減低讀錯失與網路傳輸量。我們亦希望利用此種新的資料一致性協定來減少置換錯失,並增加命中比例,使系統效能較佳。 | zh_TW |
dc.description.abstract | aches enhance the performance of multiprocessors by reducing average memory access latency, but caches in a multiprocessing environment also introduce the cache coherence problem. Cache coherence protocol prevents this problem by maintaining a uniform state for each cached block of data. The full-map protocol uses a directory, whose size is equal to the number of the processors in each main memory block. The overhead of the main memory increased severely when the number of the processors become large. In this thesis, the limited-directory protocol which uses a directory of fixed size, usually much smaller then the number of the processors, is considered. The limited-directory protocol dose not have the scalability problem and can be applied to large scale multiprocessor system easily. Because of the fix size of the directory, the protocol will generate invalidation message when the number of sharing processors is larger than the size of the directory. Thus, the limited-directory protocols will produce more network traffic for invalidation than the full-map protocol will. An extension of the directory-based protocol, which is extended from the previous limited-directory protocol, “Extended Skewed Directory-based protocol” is proposed in this thesis. We add two smaller directory pools to the previous limited-directory protocol called level1 & level2 and two different skewing functions to map the directory to these two pools. Once the directory is full, subsequent read/write will be handled with different action in different situation according to the skewing function. With this new protocol, we hope to reduce the network traffic and read miss. The added directory pools can hold more processor read records. Hence, to achieve this without increasing the whole directory size. Our new protocol is implemented by using the CacheMire simulator. Also, the result and improvement of the system performance over the original protocol is shown. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 快取記憶體資料一致性 | zh_TW |
dc.subject | 歪斜概念 | zh_TW |
dc.subject | 有限型目錄快取記憶體資料一致性協定 | zh_TW |
dc.subject | 歪斜函數 | zh_TW |
dc.subject | cache coherence | en_US |
dc.subject | skew concept | en_US |
dc.subject | limited directory-based protocol | en_US |
dc.subject | skewing function | en_US |
dc.title | 歪斜型目錄快取記憶體資料一致性協定研究 | zh_TW |
dc.title | Research on Extended Skewed Directory-based Cache Coherence Protocol | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 資訊科學與工程研究所 | zh_TW |
Appears in Collections: | Thesis |