前瞻顯示器銦鎵鋅氧薄膜電晶體之偏壓穩定性與電流誘導熱效應物理機制研究

Abstract

主動陣列平面顯示器(AMFPDs)為一迅速成長的工業且豐富我們的日常生活。其中薄膜電晶體在主動陣列平面顯示器，例如：主動陣列液晶顯示器(AMLCD)以及主動陣列有機發光二極體顯示器(AMOLED)中扮演著畫素切換以及驅動有機發光二極體的關鍵元件角色。當AMFPD朝向更大尺寸(>100吋)、更高解析度(4K2K 或 8K4K)發展時，將需要更高的電子移動率以滿足此下個世代的AMFPD應用。氧化物半導體，例如非晶態氧化銦鎵鋅由於其擁有許多有利於下個世代顯示器發展的優點，因此近年來受到廣泛的重視以及研究。然而，氧化物半導體要實際應用於顯示器工業上仍有許多可靠度的問題須克服，例如：於閘極偏壓電應力、持續電流電應力、周遭環境氣氛以及照光環境下之不穩定性。因此，本論文探討了銦鎵鋅氧薄膜電晶體於閘極偏壓電應力、自我加熱效應下之不穩定性，以及一有效隔絕外在環境之保護層研究。 本論文的第一部分探討了銦鎵鋅氧薄膜電晶體於閘極偏壓電應力下之不穩定性。元件於閘極正偏壓電應力作用下，通道內的電子會藉由熱場發射的過程而被捕獲至銦鎵鋅氧主動層與閘極絕緣層的介面缺陷或閘極絕緣層內部缺陷中，進而導致元件臨界電壓的變大。然而，不同於過往文獻報導之銦鎵鋅氧薄膜電晶體於閘極負偏壓電應力下相當穩定之特性，元件於閘極負偏壓電應力作用後表現出顯著的導通電流劣化以及電流擁擠現象。此現象可歸因於未覆蓋保護層之銦鎵鋅氧薄膜背表面與環境中水氣作用而水解，於閘極負偏壓電應力作用下，解離之氫離子造成元件之劣化。此外，ISE-電腦輔助設計模擬、霍氏轉換紅外光譜儀以及水氣分壓調變量測用來闡明這異常劣化的物理機制。為了避免銦鎵鋅氧薄膜背表面與環境氣氛，例如：氧氣、水氣、光照作用，本論文提出一高濺鍍速率之矽鋁氮氧材料作為銦鎵鋅氧薄膜電晶體的保護層。實驗結果顯示覆蓋矽鋁氮氧保護層之銦鎵鋅氧薄膜電晶體成功阻擋環境中氧氣以及水氣對元件造成的不穩定性，因此，覆蓋矽鋁氮氧保護層的銦鎵鋅氧薄膜電晶體表現相當良好的閘極正負偏壓電應力以及照光閘極負偏壓電應力之穩定性。 第二部分研究非晶態銦鎵鋅氧薄膜電晶體應用至閘極驅動陣列基板技術(Gate Driver on Array, GOA)之電性特性與元件劣化機制。首先研究元件於閘極負偏壓電應力作用下之異常臨界電壓變大的現象。此劣化現象是由於電子由閘極注入元件之氮化矽閘極絕緣層所造成，與氮化矽閘極絕緣層厚度有關，但與靠近前通道之二氧化矽閘極絕緣層厚度無關。因此，降低氮化矽閘極絕緣層的厚度可有效地降低元件於閘極負偏壓電應力操作下的電子由閘極注入之臨界電壓不穩定現象。另一方面，本論文第二部分亦研究銦鎵鋅氧薄膜電晶體之與元件尺寸有關的熱不穩定性。研究發現，元件臨界電壓隨著汲極電壓增加而增加，此現象不同於短通道效應中之汲極引發位能障下降(Drain Induced Barrier Lowering, DIBL)效應。此外，較大通道寬度或較短通道長度元件之輸出電流隨著汲極電壓上升並不會進入飽和區，輸出電流反而會下降。再者，較大通道寬度以及較短通道長度元件操作在較大汲極電壓下，將會得到較大的臨界電壓以及導通電流劣化。為了闡明此劣化之物理機制，快速ID-VG量測、調變脈衝高峰時間與低峰時間之脈衝式ID-VD量測證明此異常劣化行為是由於自我加熱效應引發之載子捕獲現象造成。為了抑制，甚至排除銦鎵鋅氧薄膜電晶體因高電流流過所引發的熱劣化，本論文提出一延伸電極結構之銦鎵鋅氧薄膜電晶體。透過變化量測時間、COMSOL模擬、 stretched-exponential 方程式以及萃取與時間有關的元件失效之臨界能量，可以證明本研究設計之延伸電極區域可有效增加元件散熱效率。因此，可以獲得適合應用於GOA技術之高可靠度銦鎵鋅氧薄膜電晶體。

Active matrix flat panel displays (AMFPDs) are a rapid growing industry that influencing our daily life. Thin-film transistors (TFTs), the most important device in AMFPDs, playing the key role in active matrix liquid crystal displays (AMLCD) and organic light-emitting diode displays (AMOLED) as switching/driving devices. When AMFPDs become larger size (>100 inch) and higher resolution (4K2K or 8K4K), the higher electron mobility is required to meet these application as pixel switch and current driver in next generation AMFPDs. Oxide semiconductor, such as amorphous InGaZnO thin film transistors have attracted much attention recently since they possess many advantageous properties that are beneficial in the development of displays. However, there are many reliability issues that must be solved for oxide semiconductor-based TFTs to be practical in the display industry, such as instability under gate bias stress, persistent current stress, surrounding ambiance and the light illumination. Therefore, the effect of gate-bias stability, self-heating effect, and an effective passivation layer for a-IGZO TFT are investigated in this dissertation. In the first part of this dissertation, gate bias stress-induced instability of a-IGZO TFTs has been investigated. Under positive gate bias stress (PGBS), channel electrons will be trapped at the IGZO/gate dielectric interface and/or in the gate dielectric bulk traps through the thermionic-field emission process, resulting in positive threshold voltage shift. However, differing from conventional stable characteristics under negative gate bias stress (NGBS), a-IGZO TFT electrical characteristics exhibit instability after NGBS, with on-current degradation and the current crowding phenomenon occurring. This is due to the surrounding moisture inducing hydrolysis of the back surface of an un-passivated a-IGZO film, with the dissociated hydrogen ion causing device deterioration. Furthermore, the ISE-Technology Computer Aided Design (ISE-TCAD) simulation tool, Fourier transform infrared spectroscopy (FTIR), and moisture partial pressure modulation measurement were utilized to clarify the physical mechanism of this anomalous degradation behavior. In order to protect the back surface of a-IGZO from the surrounding ambiance, such as oxygen, moisture, and light illumination, the high sputter rate SiAlNO passivation layer was proposed. The SiAlNO-passivated a-IGZO TFT blocks oxygen and moisture from the ambiance and exhibits excellent stability under PGBS, NGBS, and negative bias illumination stress (NBIS). The second part characterized the electrical characteristics and device degradation mechanism of a-IGZO TFTs for the use of gate driver on array (GOA) technology. First of all, an anomalous positive threshold voltage shift under NGBS has been investigated. This abnormal device degradation is attributed to gate injection which associated with the thickness of Si3N4 gate dielectric, but is independent of the thickness of SiO2 gate dielectric. Decreasing the thickness of Si3N4 gate dielectric can eliminate the gate injection phenomenon, and acquire the stable device characteristics under NGBS. In addition, an abnormal dimension-dependent thermal instability in a-IGZO TFTs was also investigated. Unlike short channel drain-induced source barrier lowering effect (DIBL), threshold voltage increases with increasing drain voltage. Furthermore, for devices with either a relatively large channel width or a short channel length, the output drain current decreases instead of saturating with an increase in drain voltage. Moreover, the wider the channel and the shorter the channel length, the larger the threshold voltage and output on-state current degradation that is observed. To clarify the physical mechanism, fast ID-VG and modulated peak/base pulse time ID-VD measurements are utilized to demonstrate that the abnormal degradation behavior is due to the self-heating effect-induced charge trapping phenomenon. In order to suppress or even eliminate this high current-induced thermal degradation in a-IGZO TFTs, an expanded-electrode structure TFT has been proposed. The experimental results of varied measurement times, the COMSOL simulation tool, the stretched-exponential equation, and the extracted critical energy of time dependent-device failure confirm that the designed expanded-electrode region can enhance the heat dissipation efficiency, so as to acquire high reliability a-IGZO TFTs suitable for the GOA application.