標題: 5.2-GHz線性度增加之功率放大器與增益提升之升頻器之設計
Design of 5.2-GHz Linearity-Enhanced Power Amplifier and Gain-Boosted Up-Conversion Mixer
作者: 陳乃菖
Chen, Nai-Chang
吳霖堃
Wu, Lin-Kun
電信工程研究所
關鍵字: 功率放大器;升頻器;power amplifier;up-conversion mixer
公開日期: 2015
摘要: 本論文探討應用於IEEE 802.11a之功率放大器與升頻器,並且採用TSMC 0.18-μm mixed-signal/RF CMOS 1P6M製程來進行電路設計以及晶片製作。   在功率放大器的設計上,採用疊接式的架構,並且為了滿足線性度的需求,選用線性式的功率放大器。有別於一般的A類、AB類、B類和C類等架構,此電路將A類與B類並聯起來一起使用,並且在B類的部分使用二極體連接的NMOS來偏壓,這兩種方法皆有使P1dB延伸的效果。此外,在疊接式架構中的共閘極部分還使用了自偏壓技術,因此輸出功率和效率得以改善。模擬結果顯示,在VDD為3.3V的情況下,功率放大器之增益為10.4 dB,OP1dB為23.1 dBm,飽和輸出功率為24 dBm。在1 dB增益壓縮點的功率附加效率為25.5 %,最高功率附加效率為27.7 %,OIP3為35.4 dBm,功率消耗為514.8 mW。   在升頻器的設計上,於轉導級中使用一個交互耦合對來產生負電阻,此方法可以在只增加一點點直流功率消耗且不犧牲線性度的情況下提高電路的轉換增益。模擬結果顯示,當RF頻率為5.2 GHz、IF頻率為100 MHz且LO頻率為5.1 GHz時,升頻器可在維持OP1dB為0.3 dBm、OIP3為12.4 dBm之高線性度的情況下,將轉換增益提升至8.4 dB。
This thesis focuses on the design of a power amplifier (PA) and an up-conversion mixer for IEEE 802.11a application. The circuit designs and chip fabrications are all implemented in TSMC 0.18-μm mixed-signal/RF CMOS 1P6M technology.   When designing the power amplifier, a cascode architecture is adoped, and linear power amplifier is chosen for the sake of linearity requirements. But instead of using conventional types such as Class-A, Class-AB, Class-B and Class-C, this circuit combines a Class-A and a Class-B together in parallel, and biases the Class-B with a diode-connected NMOS. These two methods both have the effect of extending the P1dB. In addition, this circuit uses a self-biasing technique in the common-gate stage of the cascode, therefore improving the output power and the efficiency. The simulation results show that with a 3.3V power supply, the proposed PA provides a gain of 10.4 dB, an output 1-dB Gain Compression Point (OP1dB) of 23.1 dBm with 25.5 % power add efficiency (PAE), a maximum PAE of 27.7 %, and delivers a maximum output power of 24 dBm. The OIP3 is 35.4 dBm, and the DC power consumption is 514.8 mW.   When designing the up-conversion mixer, the circuit implements a cross-coupled pair in the transconductance stage. This method can enhance the conversion gain with only a little extra DC power consumption and without sacrificing the linearity. The simulation results show that with 5.2 GHz RF frequency, 100 MHz IF frequency and 5.1 GHz LO frequency, the conversion gain is 8.4 dBm, OP1dB is 0.3 dBm, OIP3 is 12.4 dBm, and the power consumption is 5.9 mW.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT070260284
http://hdl.handle.net/11536/126668
顯示於類別:畢業論文