以可見光與遠紅外光雷射退火技術 製作低熱預算奈米級矽鍺電晶體

Abstract

本篇論文利用感應耦合電漿化學氣相沉積(ICPCVD)於低溫時(450oC)製作非晶矽鍺薄膜並且利用可見光雷射(波長532奈米)結晶成多晶矽鍺薄膜，晶粒大小約500奈米至600奈米，我們發現雷射結晶過後的多晶矽鍺薄膜會產生鍺分離的現象，造成表面鍺濃度高於底層。化學機械研磨可以將表面鍺含量高的部分去除並且平坦化表面，利用上述製程技術我們可以製作出平坦且鍺濃度均勻的多晶矽鍺薄膜。 另一方面，由於遠紅外光雷射瞬間的高能量被離子佈值完後形成的缺陷吸收，轉換成晶格震動，可產生等效的熱退火效果以降低片電阻。在我們的研究中，藉由遠紅外光雷射退火可以將參雜後的雷射多晶矽鍺薄膜的片電阻降低為290 Ohm/sq (P型) 和350 Ohm/sq. (N型). 而且參雜的硼不會產生擴散的現象。因此遠紅外光雷射退火適用於奈米級元件製程中。 整合可見光雷射結晶和遠紅外光雷射退火，我們製作出高效能的多晶矽鍺場效電晶體，P型元件中，On電流可以高達51.3 uA/um，次臨界擺幅為240 mV/dec，臨界電壓為-1.05V。N型元件中，On電流可以高達20.1 uA/um，次臨界擺幅為181 mV/dec，臨界電壓為0.95V。此元件製程技術可以應用於奈米級薄膜電晶體或累加型三維電晶體。

In this thesis, the amorphous SiGe thin film is deposited by ICPCVD at low temperature of 450oC, the SiGe thin film is then crystallized by visible laser crystallization (λ=532 nm). The grain size of as-crystallized poly-SiGe thin films range from 500 nm to 600 nm. It is found that germanium segregation is observed after laser crystallization. It causes germanium-rich region on surface of the thin film. Thus, Chemical Mechanical Polishing (CMP) is used to polish high germanium concentration region and smoothen the surface to obtain thin and flat ploy SiGe film with uniform germanium concentration distribution. Moreover, far infrared ray laser annealing (FIR-LA) can decrease sheet resistance. Laser energy is absorbed in implantation induced defect region and transfer to phonon vibration, which is equal to thermal activation effectively. . In this study, the sheet resistance of polycrystalline SiGe film can be decreased to 290 Ohm/sq. (P-type) and 350 Ohm/sq. (N-type) by far infrared ray laser annealing with less dopants diffusion due to the short time dwell time. Therefore, FIR-LA is also suitable for realizing nano-scaled devices. The combination of visible laser crystallized SiGe film and far-infrared ray laser activation demonstrated the high performance of poly SiGe metal-oxide-silicon field effect transistor (MOSFET), which exhibited high on current of 51.3 uA/um, low subthreshold swing (S.S.) of 181 mV/dec. and threshold voltage (Vth) of -1.05 V in P-type FET. The N-type device exhibited Ion of 20.1 uA/um, S.S. of 240 mV/dec, and Vth of 0.95 V. The process and related performance is of great potential for nano-scaled TFTs and monolithic 3DICs applications.